Electrical and Electronics Engineering
Assistant Professor, Electrical and Electronics Engineering, Ostim Technical University, Ankara.
Icarus Verilog and Yosys in the browser. Simulate, view waveforms, synthesize, and share code by link.
› /verisim SIM_02Logic circuit simulator with gates, MSI blocks, and timing diagrams. Circuits shareable by URL.
› /logiclab SIM_03Browser-based FPGA flow with a light Gowin-style IDE, Yosys synthesis, and a schematic viewer.
› /softfpga SIM_04PID tuning playground with step response, Bode, Nyquist, and root locus views.
› /pidlab SIM_05Satellite link budget calculator for course work, validated against exam material.
› /linkbudget